/*******************************************************************************
* Project:      Amped'RF Bluetooth
* File name:    GKI_uart.h
* Description:  Header for uart abstraction layer
*
* Copyright (c) 2013 Amped'RF Inc., AR Technology  All rights reserved.
*******************************************************************************/
#ifndef _GKI_UART_H_
#define _GKI_UART_H_



typedef u16 tGKI_Uart;
typedef u16 tGKI_IoStatus;


#define GKI_UART1       0
#define GKI_UART2       1
#define GKI_UART_MAX    2
#define GKI_MainUart    GKI_UART1
#define GKI_HciUart     GKI_UART2

#define TM_UART1_TX_PORT	        IO_MAIN_TX
#define TM_UART1_RX_PORT	        IO_MAIN_RX
#define TM_UART1_CTS_PORT           IO_MAIN_CTS
#define TM_UART1_RTS_PORT           IO_MAIN_RTS

#define TM_UART1_TX_PORT	        IO_MAIN_TX
#define TM_UART1_RX_PORT	        IO_MAIN_RX
#define TM_UART1_CTS_PORT           IO_MAIN_CTS
#define TM_UART1_RTS_PORT           IO_MAIN_RTS

#define GKI_UART_FlowControl_None       0x0000
#define GKI_UART_FlowControl_RTS        0x0100
#define GKI_UART_FlowControl_CTS        0x0200
#define GKI_UART_FlowControl_RTS_CTS    0x0300


#if defined(STM32F2xx) || defined(STM32F4xx)
#define GKI_USART_IT_PE         0x0028
#define GKI_USART_IT_TXE        0x0727
#define GKI_USART_IT_TC         0x0626
#define GKI_USART_IT_RXNE       0x0525
#define GKI_USART_IT_ORE_RX     0x0325  // In case interrupt is generated if the RXNEIE bit is set
#define GKI_USART_IT_IDLE       0x0424
#define GKI_USART_IT_LBD        0x0846
#define GKI_USART_IT_CTS        0x096A
#define GKI_USART_IT_ERR        0x0060
#define GKI_USART_IT_ORE_ER     0x0360  // In case interrupt is generated if the EIE bit is set
#define GKI_USART_IT_NE         0x0260
#define GKI_USART_IT_FE         0x0160
#endif





/*
#define eTM_USART1      0
#define eTM_USART2      1
#define eTM_UART_MAX    2



#define eTM_HciUart         eTM_USART2
#define eTM_MainUart	    eTM_USART1
#define	TM_HciUart          USART2
#define TM_MainUart         USART1
#define MAIN_UART_DR_BASE   (USART1_BASE+4)
#define HCI_UART_DR_BASE    (USART2_BASE+4)

#define eTM_UartMax         2

// Retry/delay times in milliseconds
#define BTU_TX_DELAY_TIME  100
#define BTU_RX_RETRY_TIME  3
#define TM_CHARS_PER_MILLISECOND 2
*/

typedef enum {
    GKI_IntSrc_IDLE,
    GKI_IntSrc_FULL,
    GKI_IntSrc_HALF,
    GKI_IntSrc_SWI,
    GKI_IntSrc_RXNE,
    GKI_IntSrc_ERR
} tGKI_InterruptSource;



#define GKI_UART_PARITY_NONE    0
#define GKI_UART_PARITY_EVEN    1
#define GKI_UART_PARITY_ODD     2


typedef uint8 tTM_UartDataBits;
#define eTM_dataBits7p	   	0
#define eTM_dataBits8	   	1
#define eTM_dataBits8p	   	2
#define eTM_dataBits8wu	   	3
#define eTM_dataBits9	   	4


typedef uint8 tTM_UartStopBits;
#define eTM_stopBits05	   	0
#define eTM_stopBits1	   	1
#define eTM_stopBits15	   	2
#define eTM_stopBits2	   	3


typedef uint8 tTM_UartParity;
#define eTM_NoParity	   	0
#define eTM_OddParity	   	1
#define eTM_EvenParity	   	2

typedef uint32 tTM_UartBaudRate;


////////////////////////
// UART Configuration //
////////////////////////
typedef struct {
    tTM_UartDataBits        DataBits;
    tTM_UartStopBits        StopBits;
    tTM_UartParity          Parity;
    uint32                  Baudrate;
    bool                    TimeoutEnb;
    bool                    FlowControlEnb;
} tUartConf;

typedef struct
{
  u32 USART_BaudRate;
  u16 USART_WordLength;
  u16 USART_StopBits;
  u16 USART_Parity;
  u16 USART_Mode;
  u16 USART_HardwareFlowControl;
} tGKI_uart_Init;

#define GKI_uart_WordLength_8b                  ((u16)0x0000)
#define GKI_uart_WordLength_9b                  ((u16)0x1000)
#define GKI_uart_StopBits_1                     ((u16)0x0000)
#define GKI_uart_StopBits_0_5                   ((u16)0x1000)
#define GKI_uart_StopBits_2                     ((u16)0x2000)
#define GKI_uart_StopBits_1_5                   ((u16)0x3000)
#define GKI_uart_Parity_No                      ((u16)0x0000)
#define GKI_uart_Parity_Even                    ((u16)0x0400)
#define GKI_uart_Parity_Odd                     ((u16)0x0600)
#define GKI_uart_HardwareFlowControl_None       ((u16)0x0000)
#define GKI_uart_HardwareFlowControl_RTS        ((u16)0x0100)
#define GKI_uart_HardwareFlowControl_CTS        ((u16)0x0200)
#define GKI_uart_HardwareFlowControl_RTS_CTS    ((u16)0x0300)

// Prototypes
tGKI_IoStatus GKI_UartConfig(tGKI_Uart u, tUartConf *);
tGKI_IoStatus GKI_UartConfigInterrupts(tGKI_Uart u, tUartConf *);
void GKI_uart_SetBaudrate(u16 uart, u32 baudrate);
void GKI_UartConfigPins(tGKI_Uart u);
void GKI_uart_Cmd(tGKI_Uart u, u16 enb);
void GKI_uart_SetCharTimeout(tGKI_Uart u, u32);
void GKI_uart_ITConfig(tGKI_Uart u, u16, FunctionalState);
void GKI_uart_InitStruct(tGKI_uart_Init *USART_InitStruct);
void GKI_uart_Init(u16 u, tGKI_uart_Init *USART_InitStruct);
void GKI_uart_ReceiveEnable(uint16 u, bool enb);

void GKI_putchar(char c);
void GKI_putstring(char *s);

void GKI_GenUartSwi(u16);
void GKI_SWI_HCI(void);
void GKI_SWI_MAIN(void);
//when sysclk changed,then reset uart
void GKI_uart_ReSetup(uint16 u);



#endif // _GKI_UART_H_
