/*******************************************************************************
* Project:      Amped'RF Bluetooth
* File name:    GKI_def_KEIL_ARM_CM3.h
* Description:  Definitions for KEIL_ARM_CM3.
*
* Copyright (c) 2010 Amped'RF Inc., AR Technology  All rights reserved.
*******************************************************************************/
#ifndef _GKI_DEFINE_H_
#define _GKI_DEFINE_H_

#define PA0     0x00
#define PA1     0x01
#define PA2     0x02
#define PA3     0x03
#define PA4     0x04
#define PA5     0x05
#define PA6     0x06
#define PA7     0x07
#define PA8     0x08
#define PA9     0x09
#define PA10    0x0A
#define PA11    0x0B
#define PA12    0x0C
#define PA13    0x0D
#define PA14    0x0E
#define PA15    0x0F

#define PB0     0x10
#define PB1     0x11
#define PB2     0x12
#define PB3     0x13
#define PB4     0x14
#define PB5     0x15
#define PB6     0x16
#define PB7     0x17
#define PB8     0x18
#define PB9     0x19
#define PB10    0x1A
#define PB11    0x1B
#define PB12    0x1C
#define PB13    0x1D
#define PB14    0x1E
#define PB15    0x1F

#define PC0     0x20
#define PC1     0x21
#define PC2     0x22
#define PC3     0x23
#define PC4     0x24
#define PC5     0x25
#define PC6     0x26
#define PC7     0x27
#define PC8     0x28
#define PC9     0x29
#define PC10    0x2A
#define PC11    0x2B
#define PC12    0x2C
#define PC13    0x2D
#define PC14    0x2E
#define PC15    0x2F


//------------------------------------------------------------------------------
// I/O Definitions
//------------------------------------------------------------------------------
#define _IO_INVALID                 0xFF
#define _IO_UART1_TX_PORT    	    PA9
#define _IO_UART1_RX_PORT	        PA10
#define _IO_UART1_CTS_PORT          PA11
#define _IO_UART1_RTS_PORT          PA12
#define _IO_UART2_TX_PORT	        PA2
#define _IO_UART2_RX_PORT	        PA3
#define _IO_UART2_CTS_PORT          PA0
#define _IO_UART2_RTS_PORT          PA1
#define _IO_MAIN_TX	                _IO_UART1_TX_PORT
#define _IO_MAIN_RX	                _IO_UART1_RX_PORT	
#define _IO_MAIN_CTS                _IO_UART1_CTS_PORT
#define _IO_MAIN_RTS                _IO_UART1_RTS_PORT
#define _IO_HCI_TX                  _IO_UART2_TX_PORT	
#define _IO_HCI_RX	                _IO_UART2_RX_PORT	
#define _IO_HCI_CTS                 _IO_UART2_CTS_PORT
#define _IO_HCI_RTS                 _IO_UART2_RTS_PORT
#define _IO_HCI_BT_RESET            PA6
#define _IO_HCI_BT_WAKE             PB1
#define _IO_HCI_LPCLK               PB0
#define _IO_JTDI                    PA15

#if defined(BT24)
#define _IO_HCI_BT_PWR_ON   		PA6
#define _IO_HCI_HOST_WAKE    		PA7
#define _IO_HCI_LPCLK        		PB0     // Low pwr clk for BT Controller
#define _IO_JTDI             		PA15
#define _IO_HCI_BT_CLK              _IO_INVALID
#else
#if defined(BT31) || defined(BT33)
#define _IO_LPOCLK_EN               PC9
#define _IO_HCI_HOST_WAKE           PA7
#define _IO_PA_BIAS                 _IO_INVALID
#define _IO_HCI_BT_CLK              _IO_INVALID
#else
#define _IO_LPOCLK_EN               _IO_INVALID
#define _IO_PA_BIAS                 PC9
#define _IO_HCI_HOST_WAKE           PC4
#define _IO_HCI_BT_CLK              PC8
#endif
#endif
#if defined(CUSTOM_BELWITH) && defined(BT22_REV4)
#define _IO_I2C_SCL                 PB11
#define _IO_I2C_SDA                 PB10
#elif defined(CUSTOM_SWINGBYTE)
#define _IO_I2C_SCL                 PA4
#define _IO_I2C_SDA                 PC12
#elif defined(BT24)
#define _IO_I2C_SCL                 PB8
#define _IO_I2C_SDA                 PB9
#else
#define _IO_I2C_SCL                 PB10
#define _IO_I2C_SDA                 PB11
#endif



//------------------------------------------------------------------------------
// UART & GPIO definitions
//------------------------------------------------------------------------------
#define PERIPH_BASE           ((u32)0x40000000)
#define APB1PERIPH_BASE       PERIPH_BASE
#define APB2PERIPH_BASE       (PERIPH_BASE + 0x10000)
#define AHBPERIPH_BASE        (PERIPH_BASE + 0x20000)
#define USART1_BASE           (APB2PERIPH_BASE + 0x3800)
#define USART2_BASE           (APB1PERIPH_BASE + 0x4400)
#define GPIOA_BASE            (APB2PERIPH_BASE + 0x0800)
#define GPIOB_BASE            (APB2PERIPH_BASE + 0x0C00)
#define GPIOC_BASE            (APB2PERIPH_BASE + 0x1000)
#define USART_Parity_No                      ((u16)0x0000)
#define USART_Parity_Even                    ((u16)0x0400)
#define USART_Parity_Odd                     ((u16)0x0600)
#define USART1                ((USART_TypeDef *) USART1_BASE)
#define USART2                ((USART_TypeDef *) USART2_BASE)

typedef void * USART_TypeDef;
typedef void * GPIO_TypeDef;
typedef void * DMA_Channel_TypeDef;
//typedef void * GPIOMode_TypeDef;
typedef void * I2S_InitTypeDef;

typedef enum
{ Bit_RESET = 0,
  Bit_SET
}BitAction;



#endif // _GKI_DEFINE_H_
//------------------------------------------------------------------------------
